In recent years, remarkably fine patterns are used for semiconductor devices and the like. With finer design rules, it is becoming increasingly difficult to transfer a design pattern accurately on a substrate (for example, a wafer). When transferring a design pattern onto a wafer, for example, if the pattern transferred on the wafer greatly differs from the design pattern, the following problems may be caused. Specifically, the electric properties are deteriorated, bridging, breakage, and the like occur in the pattern, and the yield is reduced.
Thus, process proximity correction (PPC) or the like is performed to correct the shape of a mask pattern so that the shape and dimension of a design pattern can be transferred accurately.
Meanwhile, it is known that a so-called micro-loading effect in an etching process increases the variation of formed pattern dimensions.
For this reason, a photomask manufacturing method has been proposed to perform process proximity correction in consideration of the micro-loading effect (refer to JP-A 2004-333529 (Kokai)).
In the technique disclosed in JP-A 2004-333529 (Kokai), first, the pattern area ratio (coverage) of a region including a pattern to be corrected is computed. Then, the design pattern is corrected on the basis of predetermined process proximity correction data for each pattern area ratio (coverage) and the computed pattern area ratio (coverage).
However, in the technique disclosed in JP-A 2004-333529 (Kokai), the density of a pattern is not taken into account. For this reason, when predetermined process proximity correction data is used, an error may occur in dimension conversion difference prediction depending on the density of the pattern. Additionally, such an error in dimension conversion difference prediction may be further increased in the recent trend of finer pattern fabrication.